The present invention relates to a method for fabricating a semiconductor device including a polymetal gate electrode made of a multilayer structure composed of a silicon film, a barrier film and a high-melting point metal film.
Recently, the performance of semiconductor devices has been remarkably improved, and there are increasing demands for a higher operation speed and lower power consumption of semiconductor devices. For example, in a fine semiconductor device having a gate width of 0.15 μm or less, for further improvement of the performance of transistors, heteropolar electrodes, that is, a p+-type electrode used for a P channel transistor and an n+-type electrode used for an N channel transistor, have been started to be used as gate electrodes instead of conventionally used n+-type homopolar electrodes.
Also, in order to further increase the operation speed and further reduce the power consumption of a semiconductor device, it is necessary to further lower the resistance of a gate electrode.
Furthermore, in order to secure an overlapping margin between a gate electrode and a contact region, self aligned contact (SAC) process has been employed.
A polymetal electrode is regarded as a promising gate electrode structure capable of meeting these requirements. A polymetal electrode is a kind of gate electrode structures, and differently from a general gate electrode of a polysilicon film alone, it has a multilayer structure composed of a lower polysilicon film, an upper metal film of tungsten or the like and a barrier metal deposited on the polysilicon film for preventing interdiffusion between the polysilicon film and the metal film.
Since a polymetal electrode can attain lower resistance than a gate electrode of polysilicon alone, a higher operation speed and lower power consumption of a device can be realized. In addition, since it matches with the SAC process, it can be suitably employed for increasing the degree of integration.
Now, a method for fabricating a semiconductor device having a polymetal electrode structure will be described with reference to FIGS. 11A through 11D and 12A through 12C.
First, as shown in FIG. 11A, a gate insulating film 11 of a silicon oxide film with a thickness of, for example, 3 nm is formed on a semiconductor substrate 10 of silicon or the like by, for example, thermal oxidation. Thereafter, a polysilicon film 12 with a thickness of, for example, 100 nm is deposited on the gate insulating film 11 by, for example, CVD.
Next, as shown in FIG. 11B, after forming a first resist pattern 13 in a first predetermined portion on the polysilicon film 12, a group V impurity 14 of phosphorus (P) or the like is implanted into the polysilicon film 12 by ion implantation at a dose of, for example, 1×1016/cm2, so as to form an n-type polysilicon film 15.
Then, as shown in FIG. 11C, after removing the first resist pattern 13 by ashing and cleaning, a second resist pattern 16 is formed in a second predetermined portion on the polysilicon film 12. Thereafter, a group III impurity 17 of boron (B) or the like is implanted into the polysilicon film 12 by the ion implantation at a dose of, for example, 1×1015/cm2, so as to form a p-type polysilicon film 18.
Subsequently, as shown in FIG. 11D, a tungsten nitride film 19 with a thickness of, for example, 10 nm, a tungsten film 20 with a thickness of, for example, 100 nm and a silicon nitride film 21 with a thickness of, for example, 150 nm are successively deposited on the n-type polysilicon film 15 and the p-type polysilicon film 18 by sputtering or CVD.
Next, as shown in FIG. 12A, after forming a chemically amplified resist film on the silicon nitride film 21, the chemically amplified resist film is subjected to lithography using KrF excimer laser as exposing light, so as to form a third resist pattern 22.
Then, a first etching system is used for etching the silicon nitride film 21 with the third resist pattern 22 used as a mask as shown in FIG. 12B, so as to form a patterned silicon nitride film 21A. Thereafter, the third resist pattern 22 is removed by the ashing and the cleaning.
Subsequently, a second etching system is used for anisotropically etching the tungsten film 20, the tungsten nitride film 19, the n-type polysilicon film 15 and the p-type polysilicon film 18 with the patterned silicon nitride film 21A used as a mask as shown in FIG. 12C, so as to form a patterned tungsten film 20A, a patterned tungsten nitride film 19A, a patterned n-type polysilicon film 15A and a patterned p-type polysilicon film 18A.
In this manner, an n-type polymetal gate electrode 23 composed of the patterned silicon nitride film 21A, the patterned tungsten film 20A, the patterned tungsten nitride film 19A and the patterned n-type polysilicon film 15A is formed, and a p-type polymetal gate electrode 24 composed of the patterned silicon nitride film 21A, the patterned tungsten film 20A, the patterned tungsten nitride film 19A and the patterned p-type polysilicon film 18A is formed. In the structures of these polymetal gate electrodes, the patterned tungsten nitride film 19A functions as a barrier film for preventing interdiffusion between the patterned tungsten film 20A and the patterned n-type polysilicon film 15A or the patterned p-type polysilicon film 18A, and the patterned silicon nitride film 21A functions as a stopper film in the SAC process.
The anisotropic etching employed for forming the n-type and p-type polymetal gate electrodes 23 and 24 is conventionally performed through multiple steps as follows as described in Japanese Laid-Open Patent Publication No. 2000-252259: The tungsten film 20 and the tungsten nitride film 21 are etched under the same conditions, and thereafter, the conditions are changed to etch a residue of the tungsten nitride film 21 and a natural oxide film (with a thickness of several nm) present on the n-type and p-type polysilicon films 15 and 18. Then, the conditions are changed again for main etching of the n-type and p-type polysilicon films 15 and 18, and ultimately, the n-type and p-type polysilicon films 15 and 18 are over-etched. Furthermore, in the etching of the tungsten film 20 and the tungsten nitride film 21, a mixed gas of a F-base gas, an O2 gas, a N2 gas and one of a Cl2 gas and a HBr gas is used; in the etching of the residue of the tungsten nitride film 21 and the natural oxide film, a Cl2 gas is used; and in the etching of the n-type and p-type polysilicon films 15 and 18, a mixed gas of a Cl2 gas, a HBr gas and an O2 gas is used. Moreover, in the main etching of the n-type and p-type polysilicon films 15 and 18, etching end point detection using plasma spectroscopic analysis is generally employed.
However, when the anisotropic etching for forming the n-type and p-type polymetal gate electrodes 23 and 24 is carried out as described above, there arises a problem that punch-through is locally caused in the gate insulating film 11 formed below the n-type polysilicon film 15.
Accordingly, the present inventor has studied the cause of punch-through of the gate insulating film 11, resulting in finding the following two causes:
The first cause will be first described with reference to FIGS. 13A through 13C.
FIG. 13A shows a cross-sectional structure obtained immediately after etching the tungsten film 20 and the tungsten nitride film 21 with the patterned silicon nitride film 21A used as a mask by using a mixed gas of a F-based gas, an O2 gas, a N2 gas, and one of a Cl2 gas and a HBr gas.
As described above, the group V impurity 14 of phosphorus (P) or the like has been implanted into the n-type polysilicon film 15 at a dose of 1×1016/cm2. The amount of an impurity that can be doped in the polysilicon film 12 (namely, the solubility limit) is determined depending upon the concentration of the impurity and the process temperature.
In the n-type polymetal gate electrode 23, the n-type polysilicon film 15 has a thickness of 100 nm and the does of phosphorus (P) is 1×1016/cm2, and therefore, the phosphorus concentration in the n-type polysilicon film 15 is approximately 1×1021/cm3. Also, the silicon nitride film 21 is deposited by the CVD at a temperature of approximately 750° C.
Accordingly, the phosphorus concentration in the n-type polysilicon film 15 is higher than the solubility limit of phosphorus in a temperature region around 750° C. (that is, approximately 1×1020/cm3). Excessive phosphorus (P) 25 that cannot be dissolved in the polysilicon film 12 is deposited in a grain boundary of the n-type polysilicon film 15.
FIG. 13B shows a cross-sectional structure obtained immediately after removing, by using a Cl2 gas, a residue of the tungsten nitride film, and a fluorocarbon deposit film and a natural oxide film present on the n-type polysilicon film 15. In this procedure, the n-type polysilicon film 15 is also etched in addition to the residue of the tungsten nitride film, the fluorocarbon deposit film and the natural oxide film. In the etching of the n-type polysilicon film 15 by using a halogen gas, it is known that the etching rate of the n-type polysilicon film 15 depends upon an impurity concentration in the n-type polysilicon film 15, and that the etching rate of the n-type polysilicon film 15 is higher as the concentration of a group V impurity is higher.
In the n-type polysilicon film 15 shown in FIG. 13A, the phosphorus concentration in the polysilicon grain boundary where the phosphorus has been deposited is high. Therefore, when the residue of the tungsten nitride film, the fluorocarbon deposit film and the natural oxide film are removed by using the Cl2 gas, the etching rate in the grain boundary of the n-type polysilicon film 15 is higher than the etching rate in the other portion. As a result, a groove 26 is formed in the grain boundary of the polysilicon film as shown in FIG. 13B.
When the groove 26 reaches the gate insulating film 11 formed below the n-type polysilicon film 15, punch-through 27 is caused in the gate insulating film 11 as shown in FIG. 13C. Also, even when the groove 26 does not reach the gate insulating film 11, the gate insulating film 11 is excessively etched in the subsequently performed main etching and over-etching of the n-type polysilicon film 15, and hence, the punch-through 27 is caused.
Next, the second cause will be described with reference to FIGS. 14A through 14C.
FIG. 14A shows a cross-sectional structure obtained immediately after etching the tungsten film 20 and the tungsten nitride film 21 with the patterned silicon nitride film 21A used as a mask by using a mixed gas of a F-based gas, an O2 gas, a N2 gas and one of a Cl2 gas and a HBr gas. In this case, the polysilicon film into which the impurity has been introduced may be any of the n-type polysilicon film 15 and the p-type polysilicon film 18, and a patterned titanium nitride film 28 A is used as a barrier film.
As shown in FIG. 14A, a residue 29 of the titanium nitride film, a fluorocarbon deposit film 30 generated and deposited during dry etching of the tungsten film and the titanium nitride film and a natural oxide film (not shown) are present on the n-type or p-type polysilicon film 15 or 18.
The principal components of the residue 29 of the titanium nitride film are a titanium fluoride (TiFx) and a titanium oxide (TiOx) generated through a reaction between titanium of the titanium nitride film and F and O present in plasma.
FIG. 14B shows a cross-sectional structure obtained immediately after removing, by using a Cl2 gas, the residue 29 of the titanium nitride film, the fluorocarbon deposit film 30 and the natural oxide film present on the n-type or p-type polysilicon film 15 or 18. In this procedure, the n-type or p-type polysilicon film 15 or 18 is also etched in addition to the residue 29 of the titanium nitride film, the fluorocarbon deposit film 30 and the natural oxide film. There are two points to be considered in this procedure.
The first point is that “the residue 29 of the titanium nitride film, the fluorocarbon deposit film 30 and the natural oxide film should be completely removed”. If the residue 29 of the titanium nitride film, the fluorocarbon deposit film 30 and the natural oxide film are not completely removed in this procedure, the residue 29 of the titanium nitride film, the fluorocarbon deposit film 30 and the natural oxide film cannot be removed through the subsequently performed main etching and over-etching of the n-type or p-type polysilicon film 15 or 18, and therefore, the residue remains after the etching of the n-type or p-type polysilicon film 15 or 18 and unavoidably causes a short-circuit of a gate interconnect.
The second point is that “the n-type or p-type polysilicon film 15 or 18 formed below the titanium nitride film should not be excessively etched”. When the n-type or p-type polysilicon film 15 or 18 formed below the titanium nitride film is excessively etched, the remaining thickness of the n-type or p-type polysilicon film 15 or 18 becomes small. Therefore, the etching end point cannot be stably detected in the subsequently performed main etching of the n-type or p-type polysilicon film 15 or 18, and hence, punch-through is caused in the gate insulating film 11 as shown in FIG. 14C.
At this point, the removal of the residue 29 of the titanium nitride film by using a Cl2 gas will be considered. The principal components of the residue 29 of the titanium nitride are a titanium fluoride and a titanium oxide that have large bonding energy and a very high boiling point. Therefore, in the etching using a Cl2 gas, the following reactions are minimally caused:TiFx+Cl→TiCl⇑+Fx⇑ and TiOx+Cl→TiCl⇑+Ox⇑Accordingly, the etching rates of the titanium fluoride and the titanium oxide cannot be increased.
On the other hand, in the etching of the n-type or p-type polysilicon film 15 or 18, a reaction, Si+Cl→SiCl⇑, is easily caused, and hence, the etching rate of the n-type or p-type polysilicon film 15 or 18 is unavoidably high.
Accordingly, the etch selectivity between the residue 29 of the titanium nitride film including the titanium fluoride and the titanium oxide and the n-type or p-type polysilicon film 15 or 18 is unavoidably very small.
Therefore, in the case where the residue 29 of the titanium nitride film, the fluorocarbon deposit film 30 and the natural oxide film are to be completely removed in this procedure, the etching should be carried out for a long time for completely removing the residue 29 of the titanium nitride film, during which the n-type or p-type polysilicon film 15 or 18 not covered with the residue 29 of the titanium nitride film is excessively etched. As a result, the remaining thickness of the n-type or p-type polysilicon film 15 or 18 is small as shown in FIG. 14B.
When the remaining thickness of the n-type or p-type polysilicon film 15 or 18 is small, the etching end point cannot be stably detected in the subsequently performed main etching of the n-type or p-type polysilicon film 15 or 18. As a result, punch-through 31 is caused in the gate insulating film 11 as shown in FIG. 14C.
In conclusion, the causes of the punch-through of the gate insulating film are: (1) since the concentration of the group V impurity in the silicon film exceeds the solubility limit, the silicon film is excessively etched in its grain boundary in the procedure for removing the residue of the barrier film of a tungsten nitride film or a titanium nitride film and the natural oxide film present on the silicon film; and (2) when the barrier film is made of a titanium nitride film, the silicon film is excessively etched in the procedure for removing the residue of the titanium nitride film or the natural oxide film present on the silicon film.